With the rapid development and wide application of integrated circuits, the demand for wafers, which are basic raw material for the integrated circuits, has increased. Wafer processing and inspection are important in semiconductor manufacturing. Due to the requirement for precision of the integrated circuits, precision processing and accurate inspection are desired for wafers.
A wafer generally needs to be repeatedly placed onto a processing stage of a system of wafer processing and inspection. This may cause a position offset for each wafer placement on the processing stage and, thus, affect accuracy of the wafer processing and inspection. To reduce the position offset, when the wafer is placed onto the processing stage, the system first performs alignment on the wafer before performing the actual wafer processing and inspection.
Conventionally, the system performs wafer alignment based on characteristic patterns selected on the wafer. However, in certain wafer processing steps, such as chemical mechanical polishing, the selected characteristic patterns may be significantly changed, such that the characteristic patterns may not be subsequently identified on the wafer. For example, FIG. 1 shows images 1-1, 1-2, 1-3, 1-4, 1-5, and 1-6 of a same site 100 on a wafer at various stages in a conventional semiconductor manufacturing process. As shown in FIG. 1, characteristic patterns at the site 100 are significantly changed in the manufacturing process.